1. Technical Field
The present invention relates to time delay integrator structures, and more particularly, to a circuit sharing time delay integrator structure.
2. Description of Related Art
Referring to FIG. 1, there is shown a circuit diagram of a conventional time delay integrator structure 100 for use in CMOS image sensing nowadays. FIG. 1 depicts a constituent unit of the conventional time delay integrator, wherein the number of the constituent units of the conventional time delay integrator equals the number of the photo detector signals to be accumulated at each pixel in operation.
As shown in FIG. 1, an output is sent to a photo detector of a preceding-level time delay integrator constituent unit and then electrically connected to a feedback amplifier circuit via a switch. Afterward, an output from an amplifying circuit is electrically connected to a next-level time delay integrator constituent unit. In doing so, it is feasible to accumulate the signals of the photo detectors at all levels.
The aforesaid implementation method does achieve signal accumulation. However, its most notable drawback is that the quantity of required circuits increases with the quantity of the signals to be accumulated and thus, in practice, the circuits are so bulky that they occupy much space. As a result, the total amount of transistors required when producing an integrated circuit is great, thereby incurring high manufacturing costs.